The present invention relates to semiconductor device fabrication and integrated circuits and, more specifically, to methods of forming a structure for a fin-type field-effect transistor and structures for a fin-type field-effect transistor.
Device structures for a field-effect transistor generally include a body region, a source and a drain defined in the body region, and a gate electrode configured to switch carrier flow in a channel formed in the body region. When a control voltage exceeding a designated threshold voltage is applied to the gate electrode, carrier flow occurs in an inversion or depletion layer in the channel between the source and drain to produce a device output current. The body region and channel of a planar field-effect transistor are located beneath the top surface of a substrate on which the gate electrode is supported.
A fin-type field-effect transistor (FinFET) is a non-planar device structure that may be more densely packed in an integrated circuit than planar field-effect transistors. A FinFET may include a fin consisting of a solid unitary body of semiconductor material, heavily-doped source/drain regions formed in sections of the body, and a gate electrode that wraps about a channel located in the fin body between the source/drain regions. The arrangement between the gate structure and fin body improves control over the channel and reduces the leakage current when the FinFET is in its ‘Off’ state in comparison with planar transistors. This, in turn, enables the use of lower threshold voltages than in planar transistors, and results in improved performance and lowered power consumption.
In conventional constructions for a FinFET, trench isolation is formed that encapsulates a lower portion of the fins. The upper portion of the fins, which are revealed above the trench isolation, represent active regions used as the channel. In a replacement gate process, the active regions of the fins may be lightly oxidized to form a thin layer of a silicon oxide on their exterior surfaces. The oxidation process consumes a thin layer of the semiconductor material, which narrows the width of the upper portions. The result is that the upper portions of the fins are narrower than the lower portions of the fins, which are encapsulated in the trench isolation during the oxidation process.